JEDEC is nearing completion of SPHBM4, a standard that enables full HBM4 bandwidth over a 512-bit interface using a 4:1 serialization, reusing standard HBM DRAM dies and a base die. The tech promises to enable a 2.5D integration on organic substrates to support up to 64 GB per stack and more stacks than HBM4 and HBM4E.

Nvidia's GPU fleet management software can track spikes in power usage, monitor utilization, detect hotspots, spot anomalies, identify software errors, and detect the physical location of processors. However, the software is completely optional for its clients.

Oracle reportedly delays some of the data centers for OpenAI from 2027 to 2028, citing labor and materials shortages.

TechInsights says Huawei's Kirin 9030 is built on SMIC’s N+3 process: an incremental, DUV-based extension of its 7nm-class technology that pushes density without EUV but falls well short of true 5nm nodes amid rising yield challenges.

Intel has evaluated wet etch tools from ACM Research for its 14A fabrication process, raising political and national security concerns.

TSMC reportedly mulls making 4nm chips in Japan amid putting construction of Fab 23 phase 2 on pause.

Chinese government began to add government-approved AI suppliers to the Information Technology Innovation List in a bid to accelerate deployment of domestic hardware. But can Chinese semiconductor industry satisfy the needs of domestic AI industry?

Nvidia has quietly developed a software-based location-verification system for its Blackwell-generation GPUs that can approximate where the hardware is operating, which could prevent smuggling of AI GPUs to China.

The U.S. government is reportedly preparing to let Nvidia ship its H200 accelerators to China, a move that could restore Nvidia’s influence in the Chinese AI market and reinforce CUDA’s dominance, but the question is if Beijing agrees to accept this hardware.

Johny Srouji, the man behind development of Apple's processors in the latest iPhones, Macs, and Watches, is reportedly pondering leaving the company.

TSMC may be accelerating its advanced packaging facility in Arizona to package the first processors as early as 2028, ahead of its partner Amkor.

TSMC clarifies A14 specifications: Even more performance, but better tools might be needed to extract the full potential of the latest process technologies.

Huawei has unveiled its Ascend NPU roadmap featuring Ascend 950, 960, 970 processors and massive SuperClusters with over a million of processors and up to 4 ZettaFLOPS FP4 performance in 2028, shifting from chip scaling to system-level scaling, amid U.S. sanctions and manufacturing constraints.

Intel needs more Core Ultra 200-series 'Arrow Lake' and 'Lunar Lake' wafers from TSMC as demand exceeds supply.